symp
symp
  • Sort Circuit

    See on Github

    Class

    CprE 281
    Digital Logic

  • Date

    2019, December

  • Time Taken

    7 Days

Info

The goal of the project was to design a finite state machine to determine if a list of numbers is sorted in ascending order. The machine has two modes. Initialization Mode: During this stage the numbers are loaded one by one into the register file. Checking Mode: A VALIDATE button or switch needs to be pressed to begin the validation process. By far the most challenging part of this project was getting everything to work together to accomplish the overall goal.