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cpre 381
2020, September
5 hours
The goal of this project was to create a barrel shifter for a processor following the MIPS ISA. I broke this problem up into 5 generate loops one for each bit of select line because each bit represents a shift by 1, 2, 4, 8, or 16 bits. As the data flows through each select bit set to 1 will apply a shift amount corresponding to the active bit. To implement the logical or arithmetic operations offered by the shifter I created a couple multiplexers to look at the most significant bit of the input and the logical of arithmetic input if both are 1 we know to append one’s on a right shift. There is no protection from trying a left arithmetic shift, it is down to the programmer to not allow this situation. (shown in waveform above with a red X).